- gate-level simulator
- програма моделювання на рівні логічних елементів
English-Ukrainian dictionary of microelectronics. 2013.
gate-level simulator
Смотреть что такое "gate-level simulator" в других словарях:
Field-programmable gate array — FPGAs should not be confused with the flip chip pin grid array, a form of integrated circuit packaging. A field programmable gate array is a semiconductor device containing programmable logic components called logic blocks , and programmable… … Wikipedia
Logic gate — A logic gate is an idealized or physical device implementing a Boolean function, that is, it performs a logical operation on one or more logic inputs and produces a single logic output. Depending on the context, the term may refer to an ideal… … Wikipedia
Aldec — Infobox Company company name = ALDEC, Inc. company company type = Private foundation = 1984 location = Henderson, Nevada, United States flagicon|USA industry = EDA products = Active HDL, Riviera, SFM, HES homepage = [http://www.aldec.com… … Wikipedia
Logic simulation — is the use of a computer program to simulate the operation of a digital circuit. Logic simulation is the primary tool used for verifying the logical correctness of a hardware design. In many cases logic simulation is the first activity performed… … Wikipedia
Simucad — Infobox Company company name = Simucad Design Automation, Inc. company company type = Private Company| foundation = 2004 location = key people = Dr Ivan Pesic, President/CEO Mr Marc Goldberg, Sales Contact industry = Software Programming homepage … Wikipedia
List of Verilog simulators — Verilog simulators are software packages that emulate the Verilog hardware description language. Verilog simulation software has come a long way since its early origin as a single proprietary product offered by one company. Today, Verilog… … Wikipedia
Computer architecture — In computer science and engineering, computer architecture is the practical art of selecting and interconnecting hardware components to create computers that meet functional, performance and cost goals and the formal modelling of those systems.… … Wikipedia
Single Stuck Line — is a fault model used in digital circuits. It is used for post manufacturing testing, not design testing. The model assumes one line or node in the digital circuit is stuck at logic high or logic low. When a line is stuck it is called a fault.… … Wikipedia
Semulation — is a computer science related neologism that combines simulation and emulation. It is the process of controlling an emulation through a simulator.emulation in computer scienceDigital hardware is described using hardware description languages… … Wikipedia
Integrated circuit design — Layout view of a simple CMOS Operational Amplifier ( inputs are to the left and the compensation capacitor is to the right ). The metal layers are colored blue and green, the polysilicon is red and vias are crosses. Integrated circuit design, or… … Wikipedia
Functional verification — Functional verification, in electronic design automation, is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question Does this proposed design do what is… … Wikipedia
